The present invention relates generally to the field of variable impedance elements and more specifically to solid-state variable impedance elements for use in electronic circuits.
Electronic circuits containing variable impedance elements are well known to the art. These variable impedance elements are usually in the form of variable resistors, also called potentiometers. Circuits using variable inductors or capacitors are also well known. These variable impedance elements are usually manually adjusted to provide a selected impedance so as to affect some aspect of the circuit in which they are located. For example, a potentiometer may be set to a value which maximizes a signal generated at a node in a given circuit.
Manual adjustment of potentiometers is usually unsatisfactory in circuits under the control of data processing systems or other external electric circuits where ongoing adjustment of the potentiometer is necessary for circuit operation. The data processing system often must change the value of the variable impedance element in a time that is short relative to the time required to complete a manual adjustment of the variable impedance element. Manual adjustment also requires the presence of a human operator which is impractical in many situations in which variable impedance elements are employed. Remote control of resistance by a computer or digital system is needed in many applications.
Potentiometers which are adjusted mechanically by motors or other actuators under external control are also known to the prior art. Although these potentiometers relieve the need for an operator, they are still unsatisfactory in many applications. First, the time to make an adjustment is still too long for many applications. Second, the long term reliability of such electromechanical devices is not sufficient for many applications requiring variable impedance elements. Finally, such systems are often too large and economically unattractive for many applications.
Solid-state potentiometers have been developed as a solution to the above problems. These potentiometers generally comprise a network of resistors that are selectively connected to a wiper terminal by a network of transistors, all of which are integrated onto a single chip of semiconductor. Because fixed-values resistors are used and because the wiper position is selected by one or more transistors, the resistance value between a wiper and a main terminal of a solid-state potentiometer can only have a finite number of values. As an example, a 16-value solid-state potentiometer may comprise 15 equal-value resistors connected in series to form a series resistor stack, with the stack being connected between the two main terminals of the potentiometer. A select transistor is then coupled between each internal node of the series-resistor stack and the wiper terminal, and between each main terminal and the wiper terminal, for a total of 16 select transistors. One of the select transistors is set in a conducting state to select one point along the series-resistor stack. As can be seen by this example, the number of resistors and transistors required to implement a solid-state potentiometer increases linearly with the desired number of discrete values. In general, the chip area and cost of implementing a solid-state potentiometer increase, and the number of resistors and transistors increase, as the number of discrete values increases.
Since the development of solid-state potentiometers, there has been a desire to find a combination of resistors and transistors that provides a larger number of discrete values with less chip area.
The present invention encompasses solid-state potentiometers that can provide a large number of discrete values using a small number of components, and therefore requiring less chip area and less cost to manufacture.
Broadly stated, a potentiometer according to the present invention comprises a first main terminal, a second main terminal, a wiper terminal, and a resistor stack comprising a plurality M of resistors coupled in series to one another at a plurality of Mxe2x88x921 internal nodes, each internal node coupling two adjacent resistors of the stack. Each of the resistors in the stack has substantially the same value of RS ohms, each of the resistors preferably being within 0.1xc2x7RS of RS. The potentiometer further comprises a first variable resistance network coupled at one end of the resistor stack and a second variable resistance network coupled at the other end of the resistor stack. The first variable resistance network has a first terminal coupled to the potentiometer""s first main terminal, a second terminal coupled to the free terminal of the first resistor in the resistor stack, and a variable resistance value R1 which varies between zero ohms and RP ohms. RP has a value of between 0.75xc2x7RS and 1.25xc2x7RS, and preferably between 0.75xc2x7RS and RS.
The second variable resistance network has a first terminal coupled to the potentiometer""s second main terminal, a second terminal coupled to the free terminal of the last resistor in the resistor stack, and a variable resistance value R2 which is maintained substantially at value of (RPxe2x88x92R1). The wiper terminal is selectively coupled to one of the internal nodes of the resistor stack, or to one of the second terminals of the variable resistor networks, to provide a coarse setting of the potentiometer. (The wiper terminal may also be selectively coupled to either of the potentiometer""s main terminals in order to provide a xe2x80x9crail-to-railxe2x80x9d range for the potentiometer.) The resistances of the variable resistance networks are changed to provide the fine resolution for the potentiometer.
As indicated above, in preferred embodiments, the resistance R2 of the second variable resistance network is coordinated in a complementary manner (R2≈RPxe2x88x92R1) to the resistance R1 of the first variable resistance network so that the sum of these two resistances is approximately constant (R1+R2≈RP) for any wiper setting of the potentiometer. By approximately constant, we mean that the sum R1+R2 is at least within 10% of RP. This results is the resistance between the main terminals of the potentiometer being kept at a substantially constant value (i.e., maintaining a constant end-to-end resistance). This is a tremendous improvement over Rxe2x88x922R ladder networks, which have widely varying end-to-end resistances. In addition, the value of RP is selected to be near to the value of resistance RS of each resistor in the resistor stack. In preferred linear potentiometer embodiments, each variable resistance network has a plurality N of resistance values which are spaced substantially equally from one another by an increment xcex94RP as follows: 0, xcex94RP, 2xc2x7xcex94RP, 3xc2x7xcex94RP, . . . , (Nxe2x88x921)xc2x7xcex94RP. In addition, the value of RP is substantially equal to the quantity (RSxe2x88x92xcex94RP), preferably being within xc2xdxc2x7xcex94RP, of that quantity, and more preferably within xc2xcxc2x7xcex94RP, and most preferably within 0.1xc2x7xcex94RP. With N discrete resistance values in the variable resistance networks, and M resistors in the resistor stack, a linear embodiment of the potentiometer will have (M+1)xc2x7N discrete values.
In a preferred embodiments of the present invention, each variable resistor network comprises a parallel combination of resistors which are selectively turned on and off by respective switches (e.g., transistors) to provide a range of discrete steps between 0 ohms and RP ohms. In linear potentiometers, these steps are substantially equal.
The above combination of two coordinated variable resistance networks placed on either side of a resistor stack enables one to construct a solid-state potentiometer which provides a large number of discrete wiper positions (values) with a constant end-to-end resistance, while using a small number of resistors and transistors relative to prior art implementations. A further advantage of the invention is that the potentiometer may be constructed with a small number of selection transistors turned on within the current path between the potentiometer""s main terminals, thereby providing higher accuracy.
Accordingly, it is an object of the present invention to provide a topology for a digitally control potentiometer which enables the construction of a solid-state potentiometer which has a larger number of discrete values while using less chip area and fewer transistors relative to prior art implementations.
It is another object of the present invention to minimize the number of selection transistors in the main current path between the main terminals of the potentiometer in order to increase the accuracy of the potentiometer.
It is yet another object of the present invention to provide a topology for a digitally controlled potentiometer which enables the construction of a solid-state potentiometer which has a larger number of discrete values while achieving a constant end-to-end resistance.
These and other objects of the present invention will become apparent to those skilled in the art from the following detailed description of the invention, the accompanying drawings, and the appended claims.